Loom
A compiler and exploration framework for heterogeneous multi-core spatial accelerators, connecting a shared hardware model, compilation, simulation, and reproducible evaluation.
Ph.D. dissertation, 2026
Sihao Liu
Research Scientist, Architecture Research Group
NVIDIA Research
My research is in computer architecture, programmable accelerators, and agentic tools for chip design and electronic design automation (EDA).
I received my Ph.D. in Computer Science from UCLA in September 2026, advised by Tony Nowatzki in the PolyArch Research Group. My dissertation is on full-stack compilation and exploration of programmable accelerator systems.
I created Humanize 1 at UCLA and am part of Humanfia. My current work brings coding agents into architecture and EDA, with independent review and executable checks.
Recent
Sep 2026 Joined NVIDIA Research and completed my Ph.D. at UCLA.
Research and open source
I am interested in making specialized hardware easier to design and program. My work ranges from accelerator microarchitecture and on-chip networks to compilers, architecture exploration, and agent-assisted engineering.
Humanize / Humanfia
I created Humanize 1 at UCLA: an implementation and independent-review loop for coding agents. I contribute to Humanfia, where we extend this approach to longer engineering tasks.
Creator of Humanize 1
OverNoC / BenchNoC
Characterization of hardened FPGA networks-on-chip and hierarchical network overlays for multi-chiplet reconfigurable systems.
Research, 2025 - 2026
DSAGEN / OverGen
Automated generation of programmable spatial architectures and FPGA overlays, bringing compilation, hardware implementation, and design-space exploration into one flow.
ISCA 2020 / MICRO 2022
ai-usage
I use coding agents daily and built ai-usage to track them across my machines. Here is the aggregate usage from my own setup.
Humanize 1 / Humanize 2 / Humanfia
Totals include cache reads. Generated tokens are shown separately.
Personal usage snapshot
Loading usage summary.
Publications
Google Scholar* Equal contribution.
Conference papers
OverGen: Improving FPGA Usability through Domain-Specific Overlay Generation
MICRO 2022
Best Paper Runner-up
PolyGraph: Exposing the Value of Flexibility for Graph Processing Accelerators
ISCA 2021
IEEE Micro Top Picks 2022
DSAGEN: Synthesizing Programmable Spatial Accelerators
ISCA 2020
IEEE Micro Top Picks 2021, Honorable Mention
Towards General Purpose Acceleration by Exploiting Common Data-Dependence Forms
MICRO 2019
IEEE Micro Top Picks 2020
Journal papers
Dissertation, preprints, and other publications
Background
Education
Ph.D. in Computer Science
University of California, Los Angeles
Advisor: Tony Nowatzki.
Loom: Full-Stack Compilation and Automated Exploration of Heterogeneous Multi-Core Spatial Accelerator Systems
M.S. in Computer Science
University of California, Los Angeles
B.Eng. in Electrical Engineering
Xi'an Jiaotong University
Summer research: UCLA PolyArch Research Group (Summer 2018); University of Lausanne (2017).
Industry
September 2026 - present
NVIDIA Research
Research Scientist
June 2022 - October 2023
SiFive
Hardware Intern, Core IP and Cache Subsystem Teams
Summer 2021
Futurewei Technologies
CPU Microarchitecture Intern
Honors and awards
- 2022MICRO Best Paper Runner-up
OverGen - 2022IEEE Micro Top Picks
PolyGraph - 2021IEEE Micro Top Picks, Honorable Mention
DSAGEN - 2020IEEE Micro Top Picks
SPU - 2019Dean's Fellowship and University Fellowship
UCLA
Academic service
Artifact Evaluation Committee, HPCA 2021.
Journal reviewer: ACM TACO, ACM TODAES, ACM TRETS, ACM TECS, IEEE TC, IEEE TCAD, IEEE TVLSI, IEEE CAL, IEEE JETCAS, Journal of Systems Architecture, Journal of Signal Processing Systems.